The
Centre for Quantum Computer Technology
The
Centre for Quantum Computer Technology links researchers at
UNSW with colleagues at the Universities of Queensland and Melbourne,
to form a national effort in the advancement of a new technology
- the fabrication of a solid-state based Quantum Computer. This
new Centre, established in January 2000 through an ARC Special
Research Centre grant has experienced a remarkable first year
of operation producing a number of major research outcomes spanning
all three nodes of the Centre.
To date the most advanced realisations
of a quantum computer are qubit (quantum bit) ion trap and liquid
state nuclear magnetic resonance systems. However scaling these
systems to large numbers of qubits will be difficult, making solid-state
architectures with their promise of scalability important. In
particular, silicon-based proposals, using nuclear or electron
spin of dopants as qubits, are attractive due to long spin relaxation
times and their potential for integration with existing silicon
technology, which dominates the world's computer industry. The
pioneering concept of using nuclear spin states of dopant atoms
in silicon as qubits was first proposed by Dr Bruce Kane in 1998
whilst working in our UNSW team as a Research Fellow. In this
design, quantum bits (or qubits) are stored on the spin of the
phosphorous nuclei, such that each dopant atom represents one
qubit (see Fig. 1). The qubits are manipulated and accessed using
metallic gates on the surface of the chip together with external
ac and dc magnetic fields. Fabrication of such devices however
requires atomic scale precision - an immense technological challenge.
It is this challenge that forms the central thrust of the Centre's
mission.
Construction of prototype QC devices
is being approached in two ways - a 'bottom up' program in which
the devices are being built atomic layer by atomic layer, using
scanned probe lithography and epitaxial semiconductor growth and
a 'top down' program in which the qubits are implanted into the
device at precise locations using a more conventional semiconductor
processing route, but with a number of significant innovations.
Both approaches require the incorporation of nanometer scale control
gates on the surface of the device to manipulate the qubits (nuclear
or electron spin) and devices capable of spin readout, for which
we have a major initiative in fast single electron transistor
read-out.
Atomic Fabrication and Crystal
Growth: "Bottom-up" Program
During 2000 the Centre achieved a major milestone on the path
to developing a production process for large-scale qubit arrays
in silicon with the demonstration of atomic precision placement
of individual phosphorus containing species on a silicon surface.
This programmed production of P atom arrays, previously not believed
possible, was patented by the Centre in 2000 and represents a
major advancement in our bottom-up atomic fabrication strategy.
The next main hurdle will be the encapsulation of these qubit
array in layers of high-crystalline-quality Si using molecular
beam epitaxy.
Integrated Quantum Computer Devices:
"Top-Down" Program
Another key breakthrough was realized in the design of a top-down
process for the fabrication of small-qubit devices, in which phosphorus
ions will be implanted into a silicon substrate from above, through
guide holes in a specially designed, multi-layer polymer resist.
Due to the inherent self-alignment designed into the process,
the P qubits can be accurately positioned ~20 nm below the surface
Al control gates on the silicon chip. During 2000 this process
was used to fabricate integrated read-out and control gate arrays
for a four-qubit device. An Australian provisional patent was
lodged for the top-down process in 2000 and a series of publications
on this work are currently being finalised.
Quantum Measurement Program
In the silicon nuclear spin quantum computer, information is stored
on the nuclear spins of individual phosphorus atoms. To read this
information out the nuclear spin is transferred to the spin of
the excess electron associated with the P-atom, using the hyperfine
interaction. Quantum computer read-out thus relies on the ability
to detect the quantum state of a single electron spin. The main
approach being developed at the Centre is to map the difficult
problem of single spin detection to the more tractable problem
of single electron charge detection, using a spin-dependent tunneling
process. These unique Single Electron Transitor (SET) devices
have been designed and fabricated at UNSW over the last year and
measurements of single charge motion are currently underway in
the Centre.
The Centre's three-year goal is on
the construction of a two-qubit silicon solid-state quantum computer
device for test by a reliable and potentially scalable fabrication
route. Whilst early significant progress has been made towards
this objective there remain several difficult technical issues
to solve. It is hoped that many of these will be addressed in
2001.

A schematic
of the Kane quantum computer architecture with individual phosphorus
atoms as qubits in silicon.

A schematic
diagram of the "bottom-up" fabrication process. A low
defect density Si (001)2x1 surface is passivated with a monolayer
of hydrogen. An STM tip is used to selectively desorb hydrogen,
exposing silicon at the atomic scale to allow one phosphine molecule
to adsorb at each of the required sites. Low temperature silicon
MBE overgrowth encapsulates the phosphorus array.

(a) A
schematic of the "top-down" fabrication strategy. Holes
are formed in a trilayer resist structure through which P ions
are implanted. (b) After removal of the top layer of resist and
chemical development, a triple angle evaporation process is used
to form the SETs and control electrodes. (c) SEM images showing
a 250 nm wide cavity below an overhanging PMMA resist layer with
Al deposited through a 50nm gap

Scanning
Tunneling Microscope images and associated line scans showing
the increased height and elongation of the sites where single
PH3 molecules have adsorbed in atomic sized holes in the Si:H
surface